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Guild: wafer.space Community
Channel: Information / general / Silver sintering
After: 04/30/2026 23:59
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[05/02/2026 16:36] namibj



[05/02/2026 16:52] namibj
For the SiC JFETs it was to provide VERY low drain-source inductance in a super cascode topology (or at least one that's only slightly fancier gate drive with some local gate drive, but overall similar behavior).

The vertical depletion mode n-channel FETs were to be arranged in a row between two selectively metalized insulator plates with the face-up vs. face-down alternating so that the stack only blocks in one direction and the load current zig-zags between the metallizations.
Like, the connecting traces were to be on the inside faces of the insulator plates. 
Both back drain and the front source& gate pads were to be sintered to the traces.

This gives basically almost double cooling performance and a capable insulator like ideally thin CVD diamond or probably (hadn't quite checked, should do just to know I guess) Mica-grade intrinsic SiC would keep the voltage contained within the sandwich. 

I should probably pick the cooling experiments back up though, it was supposed to be a gyroid-inspired lattice-size-gradient 2-volume manifold that adapted a ring or two sides of liquid inlet and a full-face vapor outlet to a fine checkerboard pattern of orifices right next to the outer side of the cooling sandwich, ensuring prevention of large vapor bubbles that could block cooling of hotspots that would then heat up worse and intensify their leidenfrost effect until the electronic safeties cut out the affected die(s) from major heating burden (to keep the magic smoke contained).

Expectations so far were and still are to use straight propane for "outdoor Germany" due to very high latent heat per vapor volume and thus minimized flow speed of the vapor phase, at coolant temperatures around 40~50C (maybe ~60C?). Hadn't accounted for speed of sound and/or vapor viscosity at the time, though.


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